• - Initial production of the 4-nanometer chip at TSMC from the third quarter of 2021

    Initial production of the 4-nanometer chip at TSMC from the third quarter of 2021
    8 Days, 7 Hours ago

    Tags:  TSMC

    Taiwan Semiconductor, abbreviated TSMC, is the largest semiconductor contract manufacturer in the world, responsible for manufacturing chipsets designed by major companies such as Qualcomm, MediaTek, Apple and many other big names in the tech world. has it. The company, which is currently manufacturing advanced 5- and 6-nanometer chipsets for various companies, recently announced at its annual meeting the start of production called Risk production for 4-nanometer chips from the third quarter of 2021. Meanwhile, other news has been published about the production schedule of the 3-nanometer process in this series. Initial production of the 4-nanometer chip at TSMC from the third quarter of 2021

    process node, also known as technology node and manufacturing lithography, a special process in semiconductor fabrication and methods Its design points out that the smaller the process node and the smaller the transistors, the more power is generated and the energy is saved. To set a standard in this regard, we can refer to Apple's 2019 A13 chipset, which was used in the structure of the company's iPhone 11 series phones; The chipset, which was made with 7-nanometer lithography, contained a total of 8.5 billion transistors. A year later, on the 5-nanometer A14 Bionic chipset in the iPhone 12 family, the number of transistors per square millimeter increased to 134.09 million, and the total number of transistors reached 11.8 billion. Other examples include Apple's 5-nanometer M1 chipset, which replaces Intel processors in Macs and uses 16 billion transistors. Unconfirmed reports indicate that Apple has begun manufacturing the M2 chipset in the TSMC suite, although no other details have been released about the specifications and manufacturing process of this chipset. Thus, it goes without saying that the smaller the lithography, the greater the number of transistors and, as a result, the higher the power of the processing chipset, and the more optimal the conditions for energy consumption. At its annual meeting, which reviews the achievements of the series over the course of a year, TSMC announced that it was one chapter ahead of its pre-determined schedule for making 4-nanometer chips; According to TSMC, 4-nanometer chips use the same design as 5-nanometer chips, but as the manufacturing process shrinks, we naturally encounter higher power, lower power consumption, and denser transistors. The production process called Risk production of these chips is scheduled for the third quarter of 2021, which, given that we are currently in the final month of the second quarter of 2021, means that this process can begin in the next month. Initial production of the 4-nanometer chip at TSMC from the third quarter of 2021

    CC Wei, CEO of TSMC, pointed out that people today are using technology to overcome the barriers that a pandemic has created for communication, collaboration and problem solving, and the digitalization process is a factor in He knew the transformation of societies as soon as possible. Wei added: "This digital transformation has opened up a whole new world of opportunities for the semiconductor industry. "Our global technology thinking represents many ways to increase and expand our technological portfolio to implement our customers' initiatives."

    Also information on the TSMC 3nm lithography, known as the N3 node Can be presented; Where we are talking about 15% faster or 30% less power (with the same number of transistors). The announcement also announced the start of the $ 12 billion TSMC plant in Arizona; The complex will enter the production phase in 2024 and will produce 5-nanometer chips at that time. This technology, of course, will be two of the most advanced back-knot technology at the point where the industry will reach in 2024.

    The company's N6RF process was also unveiled, during which a 6-nanometer process is used to build the fifth-generation RF and Wi-Fi 6 and 6e-related components. This solution has improved by 16% compared to the previous generation with 16-nanometer RF technology. Other options on display at the symposium include a solution called InFO_B, which combines a powerful mobile processor into a slim, compact package, allowing mobile makers to place DRAM in the same package. Source: TSMC

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